********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
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*Dec 22, 2014
*ECN S14-2502, Rev. A
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT SQD50N04-5m6 D G S 
M1 3 GX S S NMOS W= 6798497u L= 0.3u 
M2 S GX S D PMOS W= 6798497u L= 0.24u
R1 D 3 3.697e-03 5.524e-03 1.234e-05 
CGS GX S 1.682e-09 
CGD GX D 5.339e-11 
RG G GY 3 
RTCV 100 S 1e6 2.470e-04 -3.294e-07 
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 6798497u 
**************************************************************** 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 5e-8 
+ RS = 0 KP = 8.323e-06 NSUB = 2.522e+17 
+ KAPPA = 1.837e-01 NFS = 5.300e+11 
+ LD = 0 IS = 0 TPG = 1 CAPOP = 12 ) 
*************************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 5e-8 
+NSUB = 1.256e+16 IS = 0 TPG = -1 CAPOP = 12 ) 
**************************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 8.769e-09 TREF = 25 BV = 41 
+RS = 1.127e-02 N = 9.984e-01 IS = 1.492e-13 
+EG = 1.208e+00 XTI = -2.855e-01 TRS = 3.813e-03 
+CJO = 2.141e-10 VJ = 5.624e-01 M = 5.046e-01 ) 
.ENDS 
